IEEE 47th European Solid-State Circuits Conference
ESSCIRCESSDERC 2021 Educational Events will be available online on-demand starting from Monday 6 September 2021
Access will continue through Tuesday 30 NOVEMBER (23:59 CET) when online events will conclude and access will end.
In order to access the Virtual Educational events, you must have already registered.
Instructions on how to access the Educational Events and the Live Sessions will be sent in due time to all registered attendees.
Live Q&A Sessions will be held during the EDUCATIONAL WEEK: speakers will be present in their respective live session, providing a summary of their talk and answering questions from the audience.
4.Atomistic simulations supporting new materials & process developments Chairs: Philippe Blaise (Silvaco) and Denis Rideau (STMicrolectronics) This tutorial will introduce to atomistic methods such as Density Functional Theory (DFT), Molecular Dynamics (MD) and Non-Equilibrium Green's Functions (NEGF). Novel simulation techniques to determine atomistic details of bulk and device properties will be address, with special emphasis on applications to materials for nano/opto electronics. The tutorial will explore the potentialities of atomistic methods in predicting the physics of these new materials and structures, including defects and their electrical and optical properties, but will also discuss how to bridge the results of simulations with experiments and spectroscopic signatures.
6.High Density 3D CMOS Mixed-Signal Opportunities Chair: Philipp Häfliger (University of Oslo) Emerging monolithic/sequential 3D integration of CMOS circuits reaches high interconnection densities of close to 10^8 interconnections per mm2.
Consequently, inter-tier vias do no longer require any significant sacrifice of layout space. Combining 3D CMOS tiers of different technology nodes offers now a unique opportunity for cost effective and high performance mixed signal architectures in particular. The WS will present technology development and architecture show cases of the 3D-MUSE EU-project (https://www.3dmuse.eu).
8.Programmatic Analog IC design: Back to the Future? Chairs: Mirjana Videnovic-Misic (Silicon Austria Labs, Austria)and Thomas Brandtner (Infineon) Over the past ten years there has been growing interest in generator-based circuit design, in context of both analog and digital designs. Analog generators have been considered for ages, but is it different this time? In this workshop we address recent progress of “programmatic analog IC design”. The workshop covers not only recent examples on analog generator-based design, but also presents various methodologies that utilize generic programming languages towards analog IC design. That enables algorithmic design optimization and the control of traditional design and verification flows and tools to fully exploit the power of collaborative methodologies, widely used in software development. The programmatic approach in IC hardware design also raises questions related to enabling and managing collaborative development and open licensing of hardware. This design paradigm requires new skills of IC designers and will drastically alter their education framework. These and other questions will be discussed during the two live event sessions: Q&A and Panel Discussion.
9.SOI technology and design challenges for RF and mmWave: from Front-End Modules to SoC Chairs: Yvan Morandini (Soitec) and Eric Mercier (CEA) RF-SOI technology is becoming a standard for cellular and connectivity RFFE technologies across the last ten years. Fully depleted silicon-on-insulator (FD-SOI) is gaining ground and setting low power and RF/mmW technology standards. RF/mmW systems are facing new challenges across a number of new markets, such as IoT, automotive, 5G from sub 6GHz to millimeter wave bands. SOI technology offers remarkable device performances in terms of power, performance, area and cost tradeoffs (PPAC). In high-data rate communications like RF and millimeter-wave devices,RF-SOI and FD-SOI enable high performance platforms from RF Front End to System On Chip including numerous unique advantages making it most likely the best in class RF-CMOS technologies on the market.
This technical workshop will cover the RF-SOI and FD-SOI technology platforms with a focus on its compatibility with RF & mmWave communications. Attendees will hear from SOI experts from leading industry and research institutions presenting updates on key SOI technology developments and building blocks across the semiconductor value chain. Topics will include substrate material and device fundamentals, modeling and simulation and characterization of RF/mmW devices and circuits. The workshop will give an overview about how SOI technology is benefiting current and future broad end user applications.
11.Circuit and systems for RF/mm-wave sensing Chair: Vojkan Vidojkovic (TU Eindhoven) In the last decade wireless communications experienced exponential growth. Number of connected devices exceed the number of people on earth and the data rates can be as high as 1GB/s. The next wave in wireless technology will be about sensing the environment. The applications are very versatile. They start with automotive industry with well known car radar and driver monitoring. Next, there are many applications in industry that are related to non-destructive material testing. Finally, we could use sensing in food control, for improving efficiency in agriculture and in many medical applications for diagnostics. From semiconductor technology and design perspective a lot of progress has been made to gain speed, reliability and design flows that guarantee first-time right mm-wave circuits. The idea of this educational session is to approach RF/mm-wave sensing from application, system and circuit perspective. The goal is to get clear picture about potential of the field, system requirements and challenges and finally how to address them from circuit perspective.
12.Hardware security Chairs: Makoko Ikeda (Tokyo University), Nele Mentens (KU Leuven) Hardware security concentrates on improving or extending the hardware of a computing system to achieve protection against attacks that extract secret information or compromise the system to make it behave maliciously. In this educational event, the most important aspects of hardware security are covered, ranging from the roots of trust at the lowest level of design abstraction to security solutions at the system level. The contributors are a mixture of academics and industry representatives.
13.From InP bipolar transistors to analog front-end integrated circuits: Innovations in devices, THz measurements, compact modeling and circuits Chairs: Cristell Maneux (IMS Bordeaux) and Virginie Nodjiadjim (III-V Lab) Today, the ever growing communication services such as remote work, e-learning, e-healthcare and intensification of social relations supported by massive data transmission, give a new impulse to further investigate various methods to increase transmission network capacities with Tb/s/channel objective. This workshop will give insights into different key aspects of the device-to-circuit value chain highlighting the need for devices combining very high symbol rate multi-level signal generation with large output swing to efficiently drive electro-optical (E/O) modulators.
A variety of novel (i) InP DHBT devices –both InGaAs and Sb types-, (ii) calibration and measurement approaches, (iii) physics-based device simulation coupled methods including compact model and (iv) state-of-the-art E/O modulator results are covered in this workshop.
The consistency of the whole value chain leads, for instance, to very-high-symbol-rate PAM (or QAM) modulation formats.